Upconverter

Features

• Designed for maximum speed (f_MAX > 140 to 270 MHz)
• Optimized for 10-bit input and output datapath word widths (others on request)
• Tunable IF output frequency (with parameterized frequency word width)
• Ideal for the following applications:
  • Digital modulators/demodulators
  • Direct digital IF output
  • Wireless & wired telecommunications systems

Block Diagram

Description

The CommStack Upconverter megafunction converts a complex baseband digital signal to a “direct IF output" real digital signal at an IF frequency which may be either fixed or specified by other circuitry in real time.

This function is often used as the final stage of digital modulator designs, e.g., in DOCSIS, LMDS, or MMDS applications. The input signal may be in any of a variety of formats, including AM, BPSK, QPSK, GMSK, 8-PSK, OFDM, or 16- to 256-QAM.

The datapath is optimized for 10-bit inputs and outputs, but other datapath word widths may be implemented on a customized basis at nominal cost. Additional precision is implemented in the multipliers and output adder in order to maintain 10-bit accuracy throughout.

The digital IF carrier frequency input is parameterized to support frequency word widths of 10 bits to 40 bits or more. The frequency input may be updated in real time; e.g., as a result of a digital phase-locked loop (PLL) tracking a reference frequency input.

With performance from 140 Mbps to over 270 Mbps, depending on the device family, CommStack's Upconverter megafunction provides the high speed often required in direct IF output designs.

Device Utilization Examples

CommStack is a partner in the Altera Megafunction Partners Program and has optimized this block for the following Altera CMOS-based PLDs: ACEX™ 1K, FLEX® 10KE, APEX™ 20KE, APEX 20KC, and Mercury™ devices.