Dual Resampler 4Y
Features
- General-purpose interpolator / decimator
- Arbitrary (even time-varying and non-integer) input / output sample rate ratios
- Optimized for 10-bit input and output data path word widths (others on request)
- Designed for maximum speed (fMAX > 140 - 300 MHz, depending on device family)
- Ideal for the following applications:
- Digital modulators/demodulators
- Wireless & wired telecommunications systems
Block Diagram

Description
CommStack's Dual Resampler 4Y megafunction is a resampling interpolator with arbitrary input/output sample rate ratios (including
non-integer). The interpolator resamples a complex digital baseband signal, generating a complex output sequence at a rate either higher or
lower than the complex input sequence. The major difference between the Dual Resampler 4Y and Dual Resampler 1Y
megafunctions is that, while the 4Y expects four time samples on each of the input channels for each CLK1 period, the 1Y expects only one sample. Other input oversample ratios relative to CLK1 may be provided on a customized basis.
While many interpolators and decimators operate only at fixed integer input-to-output sampling rate ratios 1:N, and more complicated multi-rate (interpolate / decimate) schemes are often used just to obtain fixed integer-fractional ratios M:N, CommStack's Resampler megafunctions offer much greater flexibility in a smaller footprint. CommStack's design supports not only fixed integer and fixed integer-fractional ratios, but arbitrary non-fixed ratios Y as well. The ratio Y may be time-varying, as may be needed, for example, to adjust output versus input phase continuously or to change input and/or output sampling rates on-the-fly, even by non-integer ratios.
This function may be used as the final stage of digital modulator designs or as the stage just prior to an upconverter in such applications as DOCSIS, LMDS, or MMDS designs. The input signal may be in any of a variety of formats, including AM, BPSK, QPSK, GMSK, 8-PSK, OFDM, or 16- to 256-QAM. The Resampler 4Y megafunction may also be utilized in digital demodulator designs, typically as the stage just following the downconverter.
The datapath is optimized for 10-bit inputs and outputs, but other datapath word widths may be implemented on a customized basis at nominal cost. Additional precision is implemented internally in order to maintain 10-bit accuracy in the result.
With output sample rates of 140 Mbps to over 300 Mbps, depending on the target device family, CommStack's Dual Resampler 4Y megafunction provides a high-speed and flexible interpolator / decimator capability well suited to many modern digital signal processing applications.
Device Utilization Examples
CommStack is a partner in the Altera Megafunction Partners Program and has optimized this block for the following Altera CMOS-based PLDs: ACEX™ 1K, FLEX® 10KE, APEX™ 20KE, APEX 20KC, and Mercury™ devices
| Typical Altera Device Utilization |
| Device |
Speed Grade |
Logic Cells |
Embedded Array
Blocks |
fMAX
(typical) |
| EP1K100, EPF10K100E |
-1 |
956 |
1 |
144 MHz |
| EP20K100E |
-1 |
953 |
1 |
178 MHz |
| EP20K100C |
-7 |
953 |
1 |
215 MHz |
| EP1M120 |
-5 |
991 |
1 |
311 MHz |
|